A 4-bit parallel-in/parallel-out shift register will store data for ().
A. 1 clock period
B. 2 clock periods
C. 3 clock periods
D. 4 clock periods
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A 3-bit binary counter has a maximum modulus of ().
A. 3
B. 6
C. 8
D. 16
An asynchronous counter differs from a synchronous counter in ().
A. the number of states in its sequence
B. the method of clocking
C. the type of flip-flops used
D. the value of the modulus
There are at least ()flip-flops for a modulus-12 counter.
A. 12
B. 3
C. 4
D. 5
A retriggerable one-shot with an active HIGH output has a pulse width of 20ms and is triggered from a 60 Hz line. The output will be a ().
A. series of 16.7 ms pulses
B. series of 20 ms pulses
C. constant LOW
D. constant HIGH