题目内容

What’s the value of the channel capacitance between the gate and source of a MOS transistor working in saturation region?

A. ) COXWL
B. ) COXWL/2
C. ) (2/3)COXWL
D. ) 0

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Logic effort represents the ratio of the input Cap. (driven by the same input signal) of a minimum-sized complex gate over the minimum-sized inverter.

Consider the following abrupt junction diode (m=0.5): Cj0=3x10-3F/m2, AD=1μm2, and Ф0=0.64V. If we apply a reverse bias of -2.5V, what’s the value of the total junction capacitance? (select the nearest value)

A. ) 1fF
B. ) 1.15fF
C. ) 1.35fF
D. ) 1.5fF

Only 1->0 transitions are allowed at inputs of PUN.

A. ) True
B. ) False

Only inverting logic can be implemented with Domino Logic.

A. ) True
B. ) False